generating a makefile for c program linux

Dependency Rules - these lines define under what conditions a given file (or a type of file) needs to be re-compiled, and how to compile it.For example:ĬFLAGS = -g -Wall SRCS = main.c file1.c file2.c CC = gcc Variable Definitions - these lines define values for variables.You need to supply the rulesfor compiling various files and file types, and the list of dependenciesbetween files (if file 'A' was changed, then files 'B', 'C' and 'D' also need to be re-compiled), but that only has to be done once.Ī typical makefile contains lines of the following types: This iswhere makefiles are helpful.Ī makefile is a collection of instructions that should be used to compile your program.Once you modify some source files, and type the command 'make' (or 'gmake'if using GNU's make), your program will be recompiled using as fewcompilation commands as possible.Only the files you modified and those dependent upon them will be recompiled.Of-course, this is not done via usage of magic. Anything larger than that would start to get on your nerves. Compiling one madeof few sources is slightly annoying, but may be automated via a simple shellscript. A Rule For Everyone - Using 'File Type' RulesĬompiling a program made of one source file is easy.Getting Bigger - A Multi-Source Makefile Example.Starting Small - A Single-Source Makefile Example.V1.0.1 Automating Program Compilation - Writing MakefilesTable Of Contents: Automating Program Compilation - Writing Makefiles

Generating a makefile for c program linux